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MICRF220 300mhz to 450mhz, 3.3v ask/ook receiver with rssi and squelch com micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel. august 2010 9-082610-a radiotech@micrel.com m999 general description the MICRF220 is a 300mhz to 450mhz super- heterodyne, image-reject, rf receiver with automatic gain control, ask/ook demodulator, analog rssi output, and integrated squelch features. it only requires a crystal and a minimum number of external components to implement. the MICRF220 is ideal for low-cost, low- power, rke, tpms, and remote actuation applications. the MICRF220 achieves ? 110dbm sensitivity at a bit rate of 1kbps with 0.1% ber. four demodulator filter bandwidths are selectable in binary steps from 1625hz to 13khz at 433.92mhz, allowing the device to support bit rates up to 20kbps. the device operates from a supply voltage of 3.0v to 3.6v, and typically consumes 4.3ma of supply current at 315mhz and 6.0ma at 433.92mhz. a shutdown mode reduces supply current to 0.1 a typical. the squelch feature decreases the activity on the data output pin until valid bits are detected while maintaining overall re ceiver sensitivity. data sheets and support documentation can be found on micrel?s web site at: www.micrel.com . features ? ?110dbm sensitivity at 1kbps with 0.1% ber ? supports bit rates up to 20kbps at 433.92mhz ? 25db image-reject mixer ? no if filter required ? 60db analog rssi output range ? 3.0v to 3.6v supply voltage range ? 4.3ma supply current at 315mhz ? 6.0ma supply current at 434mhz ? 0.1a supply current in shutdown mode ? data output squelch until valid bits detected ? 16-pin qsop package (4.9mm x 6.0mm) ? ? 40 ? c to +105 ? c temperature range ? 3kv hbm esd rating ordering information part number temperature range package MICRF220ayqs ?40c to +105c 16-pin qsop typical application or (408) 944-0800 433.92mhz, 1kbps operation
micrel, inc. MICRF220 august 2010 2 m9999-082610-a pin configuration MICRF220ayqs pin description pin number pin name pin function 1 ro1 reference resonator connection to the pierce oscillator. may also be driven by external reference signal of 200mvp-p to 1.5v p-p amplitude maximum. internal capacitance of 7pf to gnd during normal operation. 2 gndrf ground connection for ant rf i nput. connect to pcb ground plane. 3 ant antenna input: rf signal input from antenna. internal ly ac coupled. it is recommended to use a matching network with an inductor-to-rf ground to improve esd protection. 4 gndrf ground connection for ant rf i nput. connect to pcb ground plane. 5 vdd positive supply connection for all chip functions. bypass with 0.1 f capacitor located as close to the vdd pin as possible. 6 sq squelch control logic-level input. an internal pull-up (5 a typical) pulls the logic-input high when the device is enabled. a logic low on sq squelches, or reduces, the random activity on do pin when there is no rf input signal. 7 sel0 demodulator filter bandwidth select logic-level input. this pin has an internal pull-up (3 a typical) when the chip is on. use in conjunction with sel1 to control demodulation bandwidth. 8 shdn shutdown control logic-level input. a logic-level low enables the device. a logic-level high places the device in low-power shutdown mode. an internal pull-up (5 a typical) pulls the logic input high. 9 gnd ground connection for all chip functions exc ept for rf input. connect to pcb ground plane. 10 do data output. demo dulated data output. a current limited cmos output during normal operation, 25k ? pull- down is present when device is in shutdown. 11 sel1 demodulator filter bandwidth select logic-level input. this pin has an internal pull-up (3 a typical) when the chip is on. use in conjunction with sel0 to demodulation bandwidth. 12 cth demodulation threshold voltage integration capacitor. connect a 0.1 f capacitor from cth pin-to-gnd to provide a stable slicing threshold. 13 cagc agc filter capacitor. connect a capacitor from this pin to gnd. refer to the agc loop and cagc section for information on the capacitor value. 14 rssi received signal strength indicator. the voltage on this pin is an inversed amplified version of the voltage on cagc. output is from a switched ca pacitor integrating op amp with 250 ? typical output impedance. 15 nc no connect. leave this pin floating. 16 ro2 reference resonator connection to the pierce oscillator. internal capacitance of 7pf to gnd during normal operation.
micrel, inc. MICRF220 august 2010 3 m9999-082610-a absolute maximum ratings (1) supply voltage (v dd ).................................................. +5v ant, sq, sel0, sel1, shdn dc voltage. .................... ? 0.3v to v dd + 0.3v junction temperature ...........................................+150oc lead temperature (solderi ng, 10sec.) ..................+300c storage tem perature ............................. ? 65oc to +150c maximum receiver input power ......................... +10dbm esd rating (3) .................................................... 3kv hbm operating ratings (2) supply voltage (v dd ) ............................. +3.0v to +3.6v ambient temperature (t a ).................. ?40c to +105c ant, sq, sel0, sel1, shdn dc voltage ................ .... ? 0.3v to v dd + 0.3v maximum input rf power .................................. 0 dbm receive modulation duty cycle ....................... 20~80% frequency range .......................... 300mhz to 450mhz electrical characteristics v dd = 3.3v, v shdn = gnd = 0v, sq = open, c cagc = 4.7f, c cth = 0.1f, unless otherwise noted. bold values indicate ?40c t a 105c. ?bit rate? refers to the encoded bit rate throughout this datasheet (see note 4). parameter condition min. typ. max. units continuous operation, f rf = 315mhz 4.3 operating supply current continuous operation, f rf = 433.92mhz 6.0 ma shutdown current v shdn = v dd 0.1 a receiver 433.92mhz, v sel1 = v sel0 = 0v, ber = 1% ? 112.5 433.92mhz, v sel1 = v sel0 = 0v, ber = 0.1% ? 110 315mhz, v sel1 = 0v, v sel0 = 3.3v, ber = 1% ? 112.5 conducted receiver sensitivity@1kbps (note 5) 315mhz, v sel1 = 0v, v sel0 = 3.3v, ber = 0.1% ? 110 dbm image rejection f image = f rf ? 2f if 25 db f rf = 315mhz 0.85 if center frequency (f if ) f rf = 433.92mhz 1.18 mhz f rf = 315mhz 235 ? 3db if bandwidth f rf = 433.92mhz 330 khz ? 40dbm rf input level 1.15 cagc voltage range ? 100dbm rf input level 1.55 v reference oscillator f rf = 315 mhz 9.81713 reference oscillator frequency f rf = 433.92 mhz 13.52313 mhz reference buffer input impedance ro1 when driven externally 1.6 k ? reference oscillator bias voltage ro2 1.15 v reference oscillator input range external input, ac couple to ro1 0.2 1.5 v p-p reference oscillator source current v ro1 = 0v 300 a
micrel, inc. MICRF220 august 2010 4 m9999-082610-a electrical characteristics (continued) parameter condition min. typ. max. units demodulator f ref = 9.81713mhz 165 cth source impedance, note 6 f ref = 13.52313mhz 120 k? cth leakage current in cth hold mode t a = +25oc t a = +105oc 1 10 na digital / control functions do pin output current as output source @ 0.8 v dd as output sink @ 0.2 v dd 300 680 a output rise time 600 output fall time 15pf load on do pin, transition time between 0.1xv dd and 0.9xv dd 200 ns input high voltage shdn, sel0, sel1, sq 0.8v dd v input low voltage shdn, se l0, sel1, sq 0.2v dd v output voltage high do 0.8v dd v output voltage low do 0.2v dd v rssi ? 110dbm rf input level 0.5 rssi dc output voltage range ? 50dbm rf input level 2.0 v rssi output current 5k load to gnd, ? 50dbm rf input level 400 a rssi output impedance 250 ? rssi response time v sel0 = v sel1 = 0v, rf input power stepped from no input to ? 50dbm 10 ms notes: 1. exceeding the absolute maximum rating may damage the device. 2. the device is not guaranteed to fu nction outside of its operating rating. 3. device is esd sensitive. use appropriate esd precautions . exceeding the absolute maximu m rating may damage the device. 4. encoded bit rate is 1/(shortest pulse duration) that appears at MICRF220 do pin. 5. in an on/off keyed (ook) signal, the signal level goes between a ?mark? level (when the rf signal is on) and a ?space? level (when the rf signal is off). sensitivity is defined as the input signal level when ?on? necessary to achieve a specified ber (bit error rat e). ber measured with the built-in bert function in agilent e4432b using the pn9 sequenc e. sensitivity measurement values are obtained using an inpu t matching network corresponding to 315mhz or 433.92mhz. 6. cth source impedance is inversely proportional to the refer ence frequency. in production testing, the typical source impeda nce value is verified with 12mhz reference frequency.
micrel, inc. MICRF220 august 2010 5 m9999-082610-a typical characteristics v dd = 3.3v, t a = +25oc, ber measured with pn9 sequence, unless otherwise noted. current vs. receiver frequency 3.5 4.0 4.5 5.0 5.5 6.0 6.5 300 325 350 375 400 425 450 receiver frequency (mhz) current (ma) current vs. supply voltage f rf = 433.92mhz 4.5 5.0 5.5 6.0 6.5 7.0 7.5 3.0 3.2 3.4 3.6 supply voltage (v) current vs. supply voltage f rf = 315mhz 3.5 4.0 4.5 5.0 3.0 3.2 3.4 3.6 supply voltage (v) +105oc +105oc current (ma) current (ma) +25oc +25oc -40oc -40oc cagc voltage vs. input power 1.0 1.2 1.4 1.6 1.8 2.0 -125 -100 -75 -50 -25 0 input power (dbm) ber vs. input power v sel1 = v sel0 = 0v 0.1 1 10 -116 -115 -114 -113 -112 -111 -110 input power (dbm) rssi vs. input power 0.0 0.5 1.0 1.5 2.0 2.5 -125 -100 -75 -50 -25 0 input power (dbm) cagc voltage (v) +105oc -40oc +25oc rssi voltage (v) +105oc -40oc +25oc 433.92mhz ber (%) 315mhz ` pn9 sequence at 1kbps sensitivity at 1% ber v sel1 = v sel0 = 0v -116 -114 -112 -110 -108 -106 -104 -102 -100 -98 sensitivity (dbm) 024681012 bit rate (kbps) 315mhz 433.92mhz sensitivity at 1% ber v sel1 = 0v, v sel0 = 3.3v -114 -112 -110 -108 -106 -104 -102 -100 sensitivity (dbm) 036912151821 bit rate (kbps) 315mhz 433.92mhz sensitivity at 1% ber v sel1 = 3.3v, v sel0 = 0v -112 -110 -108 -106 -104 -102 -100 -98 sensitivity (dbm) 0 10203040 bit rate (kbps) 315mhz 433.92mhz
micrel, inc. MICRF220 august 2010 6 m9999-082610-a typical characteristics (continued) v dd = 3.3v, t a = +25oc, ber measured with pn9 sequence, unless otherwise noted. sensitivity at 1% ber v sel1 = 3.3v, v sel0 = 3.3v -110 -108 -106 -104 -102 -100 -98 01020304050 bit rate (kbps) bandpass filter attenuation f xtal = 13.52313mhz -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 433.6 433.8 434.0 434.2 input frequency (mhz) attenuation (db) bandpass filter attenuation f xtal = 9.81713mhz -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 attenuation (db) sensitivity (dbm) 315mhz 433.92mhz 314.8 314.9 315.0 315.1 315.2 input frequency (mhz) sensitivity for 1% ber vs frequency f xtal = 13.52313mhz -120 -110 -100 -90 -80 -70 -60 -50 -40 sensitivity (dbm) 419 424 429 434 439 444 449 input frequency (mhz) sensitivity for 1% ber vs frequency f xtal = 9.81713mhz -120 -110 -100 -90 -80 -70 -60 -50 -40 sensitivity (dbm) 304 309 314 319 324 input frequency (mhz)
micrel, inc. MICRF220 august 2010 7 m9999-082610-a functional diagram figure 1. simplified block diagram
micrel, inc. MICRF220 august 2010 8 a m9999-082610- functional description the simplified block diagram (figure 1) illustrates the basic structure of the MICRF220 re ceiver. it is made up of four sub-blocks: ? uhf down-converter ? ask/ook demodulator ? reference and control logic ? squelch control outside the device, the MICRF220 receiver requires just a few components to operate: a capacitor from cagc to gnd, a capacitor from cth- to-gnd, a reference crystal resonator with associated loading capacitors, lna input matching components, and a power-supply decoupling capacitor. receiver operation uhf downconverter the uhf down-converter has six sub-blocks: lna, mixers, synthesizer, image reject filt er, band pass filter and if amplifier. lna the rf input signal is ac-coupled into the gate of the lna input device. the lna configuration is a cascoded common source nmos amplifier. the amplified rf signal is then fed to the rf ports of two double balanced mixers. mixers and synthesizer the lo ports of the mixers are driven by quadrature local oscillator outputs from the synt hesizer block. the local oscillator signal from the synt hesizer is placed on the low side of the desired rf signal (figure 2). the product of the incoming rf signal and local oscillator signal will yield the if frequency, which will be dem odulated by the detector of the device. the image reject mixer suppresses the image frequency which is below the wanted signal by two times the if frequency. the local oscillator frequency (f lo ) is set to 32 times the crystal reference frequency (f ref ) via a phase-locked loop synthesizer with a fully-integrated loop filter: f lo = 32 x f ref eq. 1 MICRF220 uses an if frequency scheme that scales the if frequency (f if ) with f ref according to: f if = f ref x 1000 87 eq. 2 therefore, the reference frequency f ref needed for a given desired rf frequency (f rf ) is approximately: f ref = f rf / (32 + 1000 87 ) eq. 3 figure 2. low-side injection local oscillator image-reject filter and band-pass filter the if ports of the mixer produce quadrature-down converted if signals. these if signals are low-pass filtered to remove higher-frequency products prior to the image reject filter where they are combined to reject the image frequency. the if signal then passes through a third order band pass filter. the if bandwidth is 330khz @ 433.92mhz, and will scale with rf operating frequency according to: bw if = bw if@433.92 mhz ? ? ? ? 433.92 (mhz) freq operating ? ? eq. 4 these filters are fully integrated inside the MICRF220. after filtering, four active gain controlled amplifier stages enhance the if signal to its proper level for demodulation. ask/ook demodulator the demodulator section is comprised of detector, programmable low pass filter, slicer, and agc comparator.
micrel, inc. MICRF220 august 2010 9 m9999-082610-a detector and programmable low-pass filter the demodulation starts with the detector removing the carrier from the if signal. post detection, the signal becomes baseband information. the low-pass filter further enhances the baseband signal. there are four selectable low-pass filter bw settings; 1625hz, 3250hz, 6500hz, and 13000hz for 433.92mhz operation. the low-pass filter bw is directly proportional to the crystal reference frequency, and hence rf operating frequency. filter bw values can be easily calculated by direct scaling. equation 5 illustrates filter demod bw calculation: bw operating freq = bw @433.92mhz ? ? ? ? ? ? 433.92 (mhz) freq operating eq. 5 it is very important to choose the baseband bandwidth setting suitable for the data rate to minimize bit error rate. use the operating curves that show ber vs. bit rates for different sel1, sel0 settings as a guide. this low-pass filter -3db corner, or the demodulation bw, is set at 13000hz @ 433.92mhz as default (assuming both sel0 and sel1 pins are floating, internal pull-up resistors set the voltage to v dd ). the low-pass filter can be hardware set by external pins sel0 and sel1. table 2 demonstrates the scaling for 315mhz rf frequency: v sel1 v sel0 low-pass filter bw maximum encoded bit rate gnd gnd 1625hz 2.5kbps gnd v dd 3250hz 5kbps v dd gnd 6500hz 10kbps v dd v dd 13000hz 20kbps table 1. low-pass filter selection @ 434mhz rf input v sel1 v sel0 low-pass filter bw maximum encoded bit rate gnd gnd 1170hz 1.8kbps gnd v dd 2350hz 3.6kbps v dd gnd 4700hz 7.2kbps v dd v dd 9400hz 14.4kbps table 2. low-pass filter selection @ 315mhz rf input slicer and cth the signal prior to the slicer, labeled ?audio signal? in figure 1, is still baseband analog signal. the data slicer converts the analog signal into ones and zeros based upon 50% of the slicing threshold voltage built up in the cth capacitor. after the slicer, the signal is demodulated ook digital data. when there is only thermal noise at ant pin, the voltage level on cth pin is about 650mv. this voltage starts to drop when there is rf signal present. when the rf signal level is greater than ? 100dbm, the voltage is about 400mv. the value of the capacitor from cth pin to gnd is not critical to the sensitivity of MICRF220, although it should be large enough to provide a stable slicing level for the comparator. the value used in the evaluation board of 0.1 f is good for all bit rates from 500bps to 20kbps. cth hold mode if the internal demodulated signal (do in figure 1) is at logic low for more than about 4msec, the chip automatically enters cth hold mode, which holds the voltage on cth pin constant even without rf input signal. this is useful in a transmission gap, or ?deadtime?, used in many encoding schemes. when the signal reappears, cth voltage does not need to re-settle, improving the time to output with no pulse width distortion, or time to good data (ttgd). agc loop and cagc the agc comparator monitors the signal amplitude from the output of the programmable low-pass filter. the agc loop in the chip regulates the signal at this point to be at a constant level when the input rf signal is within the agc loop dynamic range (about ? 115dbm to ? 40dbm). when the chip first turns on, the fast charge feature charges the cagc node up with 120a typical current. when the voltage on cagc incr eases, the gains of the mixer and if amplifier go up, increasing the amplitude of the audio signal (as labeled in figure 1), even with only thermal noise at the lna input. the fast-charge current is disabled when the audio signal crosses the slicing threshold, causing do? to go high, for the first time. when an rf signal is applied, a fast attack period ensues, when 600a current discharges the cagc node to reduce the gain to a proper level. once the loop reaches equilibrium, the fast attack curr ent is disabled, leaving only 15a to discharge cagc or 1.5a to charge cagc. the fast attack current is enabled only when the rf signal increases faster than the ability of the agc loop to track it.
micrel, inc. MICRF220 august 2010 10 m9999-082610-a the value of cagc impacts the time to good data (ttgd), which is defined as the time when signal is first applied, to when the pulse width at do is within 10% of the steady state value. the optimal value of cagc depends upon the setting of the sel0 and sel1 pins. a smaller cagc value does not always result in a shorter ttgd. this is due to the loop dynamics, the fast di scharge current being 600a, and the charge current being only 1.5a. for example, if v sel0 = v sel1 = 0v, the low pass filter bandwidth is set to a minimum and cagc capacitance is too small, ttgd will be longer than if cagc capacitance is properly chosen. this is because when rf signal first appears, the fast discharge period will reduce v cagc very fast, lowering the gain of the mixer and if amplifier. but since the low pass filter bandwidth is low, it takes too long for the agc comparator to see a reduced level of the audio signal, so it can not stop the discharge current. this causes an undershoot in cagc voltage and a corresponding overshoot in rssi voltage. once cagc undershoots, it takes a long time for it to charge back up because the current available is only 1.5a. table 3 lists the recommended cagc values for different sel0 and sel1 settings. v sel1 v sel0 cagc value 0v 0v 4.7 f 0v v dd 2.2 f v dd 0v 1 f v dd v dd 0.47 f table 3. minimum suggested cagc values figure 3 illustrates what occurs if cagc capacitance is too small for a given sel1, sel0 setting. here, v sel1 = 0v, v sel0 = v dd , the capacitance on cagc pin is 0.47 f, and the rf input level is stepped from no signal to ? 100dbm. rssi voltage is shown instead of cagc voltage because rssi is a buffered version of cagc (with an inversion and amplification). probing cagc di rectly can affect the loop dynamics through resistive l oading from a scope probe, especially in the state where only 1.5 a is available, whereas probing rssi does not. when rf signal is first applied, rssi voltage overshoots due to the fast discharge current on cagc, and the loop is too slow to stop this fast discharge current in time. since the voltage on cagc is too low, the audio signal level is lower than the slicing threshold (voltage on cth), and do pin is low. once the fast discharge current stops, only the small 1.5a charge current is available in settling the agc loop to the correct level, causing the recovery from cagc undershoot/rssi overshoot condition to be slow. as a result, ttgd is about 9.1ms. figure 3. rssi overshoot and slow ttgd (9.1ms) figure 4 shows the behavior with a larger capacitor on cagc pin (2.2 f), v sel1 = 0v, and v sel0 = v dd . in this case, v cagc does not undershoot (rssi does not overshoot), and ttgd is relatively short at 1ms. figure 4. proper ttgd (1ms) with sufficient cagc reference oscillator the reference oscillator in t he MICRF220 (figure 5) uses a basic pierce crystal oscillator configuration with mos transconductor to provide negative resistance. though the MICRF220 has built-in load capacitors for the crystal oscillator, the external load capacitors are still required for tuning it to the right frequency. ro1 and ro2 are external pins of the MICRF220 to connect the crystal to the reference oscillator.
micrel, inc. MICRF220 august 2010 11 m9999-082610-a v bias ro2 r ro1 c c figure 5. reference oscillator circuit reference oscillator crystal frequency can be calculated according to equation 3. for example, if f rf = 433.92mhz, f ref = 13.52313mhz. table 4 lists the values of reference frequencies at different popular rf frequencies. to operate the MICRF220 with minimum offset, use proper loading capacitance recommended by the crystal manufacturer. rf input frequency (mhz) reference frequency (mhz) 315.0 9.81713* 390.0 12.15446 418.0 13.02708 433.92 13.52313* *empirically derived, slightly different from equation 3. table 4. reference frequency examples squelch operation when squelch function is enabled by tying the sq pin low, the chip will monitor incoming pulse width before allowing activity on do pin. the pulse width is set by sel1 and sel0 pins as shown in table 5, and is inversely proportional to frequency. when there is no input signal and squelch is not enabled (sq pin left floating), voltage on do chatters due to random noise as shown in figure 6. if sq pin is tied low, the activity on do pin is much reduced as shown in figure 7. figure 6. data out pin with no squelch (v sq = v dd ) when squelch function is enabled by tying the sq pin low, the chip will monitor incoming pulse width before allowing activity on do pin. the pulse width is set by sel1 and sel0 pins as shown in table 5, and is inversely proportional to frequency. when there is no input signal and squelch is not enabled (sq pin left floating), voltage on do chatters due to random noise as shown in figure 6. if sq pin is tied low, the activity on do pin is much reduced as shown in figure 7. figure 7. data out pin with squelch (v sq = 0v)
micrel, inc. MICRF220 august 2010 12 m9999-082610-a v sel1 v sel0 pulse width at 315mhz ( s) pulse width at 433.92mhz ( s) 0v 0v 420 305 0v v dd 210 152 v dd 0v 105 76 v dd v dd 53 38 when four or less out of eight pulses (at do signal labeled in figure 1) are good, the do output is squelched. if good pulse count increases to seven or more in any eight sequential pulses, squelch is disabled, thereby allowing data to output at do pin. a good pulse has a duration that is greater than the values listed in table 5, and it can be a high or a low pulse. for other frequencies pulse times are calculated as follows: table 5. pulse width settings in squelch pw = pw @433.92 mhz ? ? ? ? ? ? ? ? freq(mhz) operating 433.92 eq. 6
micrel, inc. MICRF220 august 2010 13 m9999-082610-a application information figure 8. MICRF220 ev board application example
micrel, inc. MICRF220 august 2010 14 m9999-082610-a supply voltage ramping when supply voltage is initially applied, it should rise monotonically from 0v to 3.3v to ensure proper startup of the crystal oscillator and the pll. it should not have multiple bounces across 2.6v, which is the threshold of the undervoltage lockout (uvlo) circuit inside MICRF220. antenna and rf port connections figure 8 shows the schem atic of the MICRF220 evaluation board. figures 9 thru 11 depict pcb images. this evaluation board is a good starting point for the prototyping of most applications. the evaluation board offers two options of injecting the rf input signal: through a pcb antenna or through a 50 sma connector. the sma connection allows for conductive testing, or an external antenna. low-noise amplifier input matching capacitor c3 and inductor l2 form the ?l? shape input matching network to the sma connector. the capacitor cancels out the inductive portion of the net impedance after the shunt inductor, and provides additional attenuation for low-frequency outside band noise. the inductor is chosen to over resonate the net capacitance at the pin, leaving a net-positive reactance and increasing the real part of the impedance. it also provides additional esd protection for the antenna pin. the input impedance of the device is listed in table 6 to aid calculation of matching values. note that the net impedance at the pin is easily affected by component pads parasitic due to the high input impedance of the device. the numbers in table 6 does not include trace and component pad parasitic capacitance, which total about 0.75pf on the evaluation board. the matching components to the pcb antenna (l3 and c9) were empirically derived for best over-the-air reception range. frequency (mhz) z device ( ? ) 315 23 ? j290 390 14 ? j230 418 17 ? j216 433.92 12 ? j209 table 6. input impedance for the most used frequencies crystal selection the crystal resonator provides a reference clock for all the device internal circuits. crystal tolerance needs to be chosen such that the down-converted signal is always inside the if bandwidth of MICRF220. from this consideration, the tolerance should be 50ppm on both the transmitter and the MICRF220 side. esr should be less than 300 ? , and the temperature range of the crystal should match the range required by the application. with the abracon crystal listed in the bill of materials, a typical MICRF220 crystal oscillator still starts up at 105oc with additional 400 ? series resistance. the oscillator of the MICRF220 is a pierce-type oscillator. good care must be taken when laying out the printed circuit board. avoid long traces and place the ground plane on the top layer close to the refosc pins ro1 and ro2. when care is not taken in the layout, and the crystals used are not verified, the oscillator may not start or takes longer to start. time-to-good-data will be longer as well. pcb considerations and layout figures 9 thru 11 illustrate the MICRF220 evaluation board layout. the gerber files provided are downloadable from the micrel website and contain the remaining layers needed to fabricate this board. when copying or making one?s own boards, make the traces as short as possible. long traces alter the matching network and the values suggested are no longer valid. suggested matching values may vary due to pcb variations. a pcb trace 100 mils (2.5mm) long has about 1.1nh inductance. optimization should always be done with exhaustive range tests. make sure the individual ground connection has a dedicated via rather then sharing a few of ground points by a single via. sharing ground via will increase t he ground path inductance. ground plane should be solid and with no sudden interruptions. avoid using ground plane on top layer next to the matching elements. it normally adds additional stray capacitance which changes the matching. do not use phenolic materials as they are conductive above 200mhz. typically, fr4 or better materials are recommended. the rf path should be as straight as possible to avoid loops and unnecessary turns. separate ground and v dd lines from other digital or switching power circuits (s uch microcontroller?etc). known sources of noise should be laid out as far as possible from the rf circuits. avoid unnecessary wide traces which would add more distribution capacitance (between top trace to bottom gnd plane) and alter the rf parameters.
micrel, inc. MICRF220 august 2010 15 m9999-082610-a figure 9. MICRF220 ev board assembly figure 10. MICRF220 ev board top layer figure 11. MICRF220 ev board bottom layer
micrel, inc. MICRF220 august 2010 16 m9999-082610-a MICRF220 evaluation board ( 433.92mhz) bill of materials item part number manufacturer description c3 grm1885c1h1r2cz01 murata (1) 1.2pf 100v, 0.25pf, 0603 c4 grm21br60j475ke01l murata (1) 4.7 f 6.3v, 0805 c5, c6 grm188r71e104ka01d murata (1) 0.1 f 25v, 0603 c7, c12, jp3 np c9 grm1885c1h1r5cz01 murata (1) 1.5pf, 100v, 0.25pf, 0603 c10, c11 grm1885c1h100ja01d murata (1) 10pf 50v, 0603 j2 np, sma, edge conn. j3 571-41031480 ampmodu breakaway headers 40 p(6pos) r/a header gold jp1, jp2 crcw04020000z vishay (2) 0 ? , 0402 l2 lqg18hn39nj00 murata (1) 39nh, 5%, 0603 l3 lqg18hn33nj00 murata (1) 33nh, 5%, 0603 r3 crcw0402100kfkea 100k ? , 0402 r4 np y1 abls-13.52313mhz-10j4y abracon (3) 13.52313mhz, hc49/us y2 dsx321gk-13.52313mhz kds (4) np, (13.52313mhz, ? 40 c to +105 c), dsx321gk u1 MICRF220ayqs micrel, inc. (5) 300mhz to 450mhz, 3.3v ask/ook receiver with rssi and squelch notes: 1. murata: www.murata.com . 2. vishay: www.vishay.com . 3. abracon: www.abracon.com . 4. kds: www.kds.info/index_en.htm . 5. micrel, inc.: www.micrel.com .
micrel, inc. MICRF220 august 2010 17 m9999-082610-a MICRF220 evaluation board (3 15mhz) bill of materials item part number manufacturer description c3 grm1885c1h1r5cz01 murata (1) 1.5pf 100v, 0.25pf, 0603 c4 grm21br60j475ke01l murata (1) 4.7 f 6.3v, 0805 c5, c6 grm188r71e104ka01d murata (1) 0.1 f 25v, 0603 c7, c12, jp3 np c9 grm1885c1h1r2cz01 murata (1) 1.2pf, 100v, 0.25pf, 0603 c10, c11 grm1885c1h100ja01d murata (1) 10pf 50v, 0603 j2 np, sma, edge conn. j3 571-41031480 mouser (2) ampmodu breakaway header s 40 p(6pos) r/a header gold jp1, jp2 crcw04020000z vishay (3) 0 ? , 0402 l2, l3 lqg18hn68nj00 murata (1) 68nh, 5%, 0603 r3 crcw0402100kfkea 100k ? , 0402 r4 np y1 abls-9.81713mhz-10j4y abracon (4) 9.81713mhz, hc49/us y2 dsx321gk-9.81713mhz kds (5) np, (9.81713mhz, ? 40c to +105 c), dsx321gk u1 MICRF220ayqs micrel, inc. (6) 300mhz to 450mhz, 3.3v ask/ook receiver with rssi and squelch notes: 1. murata: www.murata.com . 2. mouser: www.mouser.com . 3. vishay: www.vishay.com . 4. abracon: www.abracon.com . 5. kds: www.kds.info/index_en.htm . 6. micrel, inc.: www.micrel.com .
micrel, inc. MICRF220 package information qsop16 package type (aqs16) micrel, inc. 2180 fortune drive san jose, ca 95131 us a tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is belie ved to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. can nt ? 2010 micrel, incorporated. august 2010 18 m9999-082610-a

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